Lesson plan
Anton (computer)
Anton is a massively parallel supercomputer designed and built by D. E. Shaw Research in New York, first running in 2008. It is a special-purpose system for molecular dynamics (MD) simulations of proteins and other biological macromolecules. An Anton machine consists of a substantial number of application-specific integrated circuits (ASICs), interconnected by a specialized high-speed, three-dimensional torus network. Unlike earlier special-purpose systems for MD simulations, such as MDGRAPE-3 developed by RIKEN in Japan, Anton runs its computations entirely on specialized ASICs, instead of dividing the computation between specialized ASICs and general-purpose host processors. Each Anton ASIC contains two computational subsystems. Most of the calculation of electrostatic and van der Waals forces is performed by the high-throughput interaction subsystem (HTIS). This subsystem contains 32 deeply pipelined modules running at 800 MHz arranged much like a systolic array. The remaining calculations, including the bond forces and the fast Fourier transforms (used for long-range electrostatics), are performed by the flexible subsystem. This subsystem contains four general-purpose Tensilica cores (each with cache and scratchpad memory) and eight specialized but programmable SIMD cores called geometry cores. The flexible subsystem runs at 400 MHz.…
Article summary
Anton is a massively parallel supercomputer designed and built by D. E. Shaw Research in New York, first running in 2008. It is a special-purpose system for molecular dynamics (MD) simulations of proteins and other biological macromolecules. An Anton machine consists of a substantial number of application-specific integrated circuits (ASICs), interconnected by a specialized high-speed, three-dimensional torus network. Unlike earlier special-purpose systems for MD simulations, such as MDGRAPE-3 developed by RIKEN in Japan, Anton runs its computations entirely on specialized ASICs, instead of dividing the computation between specialized ASICs and general-purpose host processors. Each Anton ASIC contains two computational subsystems. Most of the calculation of electrostatic and van der Waals forces is performed by the high-throughput interaction subsystem (HTIS). This subsystem contains 32 deeply pipelined modules running at 800 MHz arranged much like a systolic array. The remaining calculations, including the bond forces and the fast Fourier transforms (used for long-range electrostatics), are performed by the flexible subsystem. This subsystem contains four general-purpose Tensilica cores (each with cache and scratchpad memory) and eight specialized but programmable SIMD cores called geometry cores. The flexible subsystem runs at 400 MHz.…
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Discussion questions
- Summarise the article in your own words. Which single claim would you verify first, and why?
- Which claim in this article is most likely to be revised as the sources update? How would you check its current status?
- If two sources disagreed about one of these facts, what would you need in order to trust one over the other?
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Key claims and bibliography are generated from the same tracked claims and sources as the article page.