Body effect

The body effect (also known as substrate bias effect) is an undesired second-order effect present in field-effect transistors (MOSFET) that describes the change in transistor's threshold voltage ( V_{th} ) resulting from a potential difference between the source and the bulk (substrate) terminals. While ideal first-order MOSFET models assume that the source and bulk are tied to the same potential, in many integrated circuit topologies the source voltage varies dynamically while the substrate is kept at a global reference potential. This voltage difference alters the internal electrostatic balance of the device, strongly modifying the device biasing condition, switching characteristics and amplification capabilities.

The body effect (also known as substrate bias effect) is an undesired second-order effect present in field-effect transistors (MOSFET) that describes the change in transistor's threshold voltage ( V_{th} ) resulting from a potential difference between the source and the bulk (substrate) terminals. While ideal first-order MOSFET models assume that the source and bulk are tied to the same potential, in many integrated circuit topologies the source voltage varies dynamically while the substrate is kept at a global reference potential. This voltage difference alters the internal electrostatic balance of the device, strongly modifying the device biasing condition, switching characteristics and amplification capabilities. When a non zero source-to-bulk voltage ( V_{SB} ) is applied, the electrical behavior of the channel area is altered. More precisely, when the source-to-body junction is pushed more into reverse bias by V_{SB} , the depletion layer beneath the gate oxide widens, increasing the amount of uncompensated doping ions exposed by the field effect. This leads to a larger voltage drop across the entire oxide region and, as a result, a larger charge must be balanced by the gate to reach inversion. In other words, a higher V_{GB} , and therefore threshold voltage, is required to allow the formation of the inversion channel with respect to the V_{SB}=0 condition. neutral condition ( V_{SB}=0 ) reverse body biasing ( V_{SB}>0 ) The forward body biasing condition ( V_{SB} ) is usually neglected as a valid operating regime as it generally fails to prevent currents flowing in the source-bulk and drain-bulk p-n junctions, therefore impairing the correct MOSFET operation. An equivalent argument can also be derived for the dual pMOS device. === Neutral condition (V SB = 0) === ) depleting holes from the interface. The figure depicts the threshold condition for inversion within an nMOS device in absence of body biasing ( V_{GB}=V_{th0} ). A unique E_F must exist in the considered section since no current is flowing in V_{SB}=0 and V_{DS}=0 condition. Bottom panel: in presence of body biasing, the applied V_{SB} splits the Fermi levels requiring a larger V_{GB} to create an inversion channel. ]] Under zero body bias condition ( V_{SB}=0 ) and when the drain and source terminals are cosidered at same electrostatic potential ( V_{DS}=0 ), a single and constant Fermi level ( E_F ) exists across the entire substrate-channel structure. To establish an electron conduction channel between the source and drain, the energy bands must bend downward at the semiconductor-oxide interface. This so called threshold condition for inversion, for which the density of electrons at the interface reaches the same doping value of holes in the bulk, is obtained when the surface potential satisfies the following equation: \phi_s = 2|\phi_F| where \phi_F is called bulk Fermi potential, and defined as: \phi_F = \frac{k_B T}{q}\ln\bigg(\frac{N_{A}}{n_i}\bigg) here, k_B is the Boltzmann constant, T is the absolute temperature expressed in Kelvin, q is the elementary charge, N_{A} is the substrate acceptor doping concentration in the bulk and n_i is the intrinsic carrier concentration of the semiconductor. The inversion charge induced at the interface, due to the externally applied voltage V_{GB} , can be expressed as: Q_{inv}=C_{ox}\bigg(V_{GB}-V_{FB}-\phi_s-\frac{Q_{dep}(\phi_s)}{C_{ox}}\bigg) =C_{ox}(V_{GS}-V_{th0}) where C_{ox} is the gate oxide capacitance per unit area, V_{FB} is the flat band voltage of the device, Q_{dep} is the depletion charge density exposed in the substrate (depletion layer), while V_{th0} is defined as the threshold voltage of the structure at zero substrate bias and it indicates the minimum V_{GB} needed to obtain an appreciable inversion charge (channel). Note that, since the source and bulk terminals are at the same electrostatic potential, the equation V_{GB}=V_{GS} holds. \phi_s = 2|\phi_F| + V_{SB} Given the higher surface potential needed, the amount of charge collected at the oxide-semiconductor interface becomes: Q_{inv}=C_{ox}\bigg(V_{GB}-V_{FB}-2|\phi_F| - V_{SB} -\frac{Q_{dep}(2|\phi_F| + V_{SB})}{C_{ox}}\bigg) that can be expressed in a more convenient way as a function of the threshold voltage V_{th0} as: Q_{inv}=C_{ox} \bigg( V_{GS}-V_{th0} - \frac {Q_{dep}(2|\phi_F| + V_{SB}) - Q_{dep}( 2|\phi_F|)} {C_{ox}} \bigg) = C_{ox}(V_{GS}-V_{th}) where V_{th} is the general expression of the threshold voltage of the device in presence of body biasing. As expected, the resulting threshold is modulated by the additional charge exposed in the substrate by the source-to-body voltage, while the last equation allows to derive a more comprehensive expression for V_{th} as a function of V_{SB} , with no actual assumption regarding the doping profile present in the bulk. V_{th}=V_{th0}+\gamma\bigg(\sqrt{2|\phi_F|+V_{SB}} - \sqrt{2|\phi_F|}\bigg) where \gamma is the body effect coefficient expressed as: \gamma=\frac{\sqrt{2\epsilon_{si}qN_A}}{C_{ox}} here, \epsilon_{si} is the permittivity of silicon. This formulation highlights how geometric and technological parameters dictate the influence of the body on the threshold voltage. Specifically, it demonstrates that the body effect scales with: doping concentration ( N_A ): a higher substrate doping increases the depletion charge, potentially intensifying the body effect; oxide thickness ( t_{ox} ): embedded within C_{ox}=\frac{\epsilon_{ox}}{t_{ox}} , a thinner oxide increases the gate control on the channel, thereby shielding it from unwanted body variations. g_{mb}=\frac{\partial{I_D}}{\partial{V_{BS}}} = \frac{\partial{V_{th}}}{\partial{V_{BS}}} \frac{\partial{I_D}}{\partial{V_{th}}} = \eta g_{m} where g_m is the small-signal gate transconductance of the MOSFET and \eta ( typically ranging from 0.1 to 0.3) represents the ratio between the body transconductance and its gate equivalent. Its expression can be directly derived from the body effect equation, yielding: \eta=\frac{\partial{V_{th}}}{\partial{V_{BS}}}=\frac{\gamma}{2\sqrt{|2\phi_F| + V_{SB}}} =\frac{C_{dep}}{C_{ox}} \bigg|_{V_{SB}=0} Noticing that \eta not only provides a way to quantify the body contribution to the drain current but it is also a compact measure of the threshold voltage sensitivity to any V_{SB} variation. Performance degradation in digital circuits: in logic gates (such as NAND/NOR gates or pass-transistor logic), pull-up or pull-down networks utilize series-connected transistors. In these structures, some of the devices do not experience zero source-to-bulk voltage ( V_{SB}=0 ). The resulting threshold voltage modulation due to body effect decreases the available overdrive voltage of the device, degrading propagation delays and reducing the switching speed of the logic gates.

References

External links

MOSFET threshold voltage notes MOSFET body effect notes Analog design lectures by Behzad Razavi Introduction to nanoelectronics MIT edu - electron devices

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