Chronologic Simulation

Chronologic Simulation was a company based in Los Altos, California, United States which provided Verilog HDL simulation products. Chronologic Simulation's main product was the Verilog Compiled Simulator (VCS) HDL simulator. In 1994 Chronologic was sold to Viewlogic Systems and in 1997 Viewlogic was acquired by Synopsys, Inc.

Chronologic Simulation was a company based in Los Altos, California, United States which provided Verilog HDL simulation products. Chronologic Simulation's main product was the Verilog Compiled Simulator (VCS) HDL simulator. In 1994 Chronologic was sold to Viewlogic Systems and in 1997 Viewlogic was acquired by Synopsys, Inc. ==Background== In the late 1980s and early 1990s integrated circuits were being designed and verified in Verilog HDL simulators. These simulators were focused on gate level speed and were implemented as language interpreters. Verilog HDL was proprietary and owned by Cadence Design Systems after their acquisition in 1989 of Gateway Design Automation. There was competition to Verilog from the US DoD VHDL language that became an IEEE standard and in 1991 Cadence made the proprietary Verilog HDL public and created Open Verilog International (OVI) (later renamed Accellera) to standardize it. ==Acquisition== Chronologic Simulation was acquired in 1994 for $26.5 million by Viewlogic Systems, Inc. though there were complications that resulted in lawsuits that were ultimately resolved in 1995. In 1997 Synopsys, Inc., acquired Viewlogic for $497 million. ==Status== VCS is still used and has been kept up to date with the evolution in the Verilog language, including features from Superlog that became part of SystemVerilog around 2005. VCS is a part of Synopsys verification solutions.

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