Link register

Article summary

A link register (LR for short) is a register which holds the address to return to when a subroutine call completes. This is more efficient than the more traditional scheme of storing return addresses on a call stack, sometimes called a machine stack. The link register does not require the writes and reads of the memory containing the stack which can save a considerable percentage of execution time with repeated calls of small subroutines. The IBM POWER architecture, and its PowerPC and Power ISA successors, have a special-purpose link register, into which subroutine call instructions put the return address. In some other instruction sets, such as the ARM architectures, SPARC, and OpenRISC, subroutine call instructions put the return address into a specific general-purpose register, so that register is designated by the instruction set architecture as the link register. The ARMv7 architecture uses general-purpose register R14 as the link register, OpenRISC uses register r9, and SPARC uses "output register 7" or o7. In some others, such as PA-RISC, RISC-V, and the IBM System/360 and its successors, including z/Architecture, the subroutine call instruction can store the return address in any general-purpose register; a particular register is usually chosen, by convention, to be used as the link register.…

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