Lesson plan
Massbus
The Massbus is a high-performance computer input/output bus designed in the 1970s by Digital Equipment Corporation (DEC). The architecture development was sponsored by Gordon Bell and John Levy was the principal architect. The bus was used by Digital to interconnect its highest-performance computers with magnetic disk and magnetic tape storage equipment. The use of a common bus was intended to allow a single controller design to handle multiple peripheral models, and allowed the PDP-10, PDP-11, and VAX computer families to share a common set of peripherals. At the time there were multiple operating systems for each of the 16-bit, 32-bit, and 36-bit computer lines. The 18-bit PDP-15/40 connected to Massbus peripherals via a PDP-11 front end. An engineering goal was to reduce the need for a new driver per peripheral per operating system per computer family. Also, a major technical goal was to place any magnetic technology changes (data separators) into the storage device rather than in the CPU-attached controller. Thus the CPU I/O or memory bus to Massbus adapter needed no changes for multiple generations of storage technology.…
Article summary
The Massbus is a high-performance computer input/output bus designed in the 1970s by Digital Equipment Corporation (DEC). The architecture development was sponsored by Gordon Bell and John Levy was the principal architect. The bus was used by Digital to interconnect its highest-performance computers with magnetic disk and magnetic tape storage equipment. The use of a common bus was intended to allow a single controller design to handle multiple peripheral models, and allowed the PDP-10, PDP-11, and VAX computer families to share a common set of peripherals. At the time there were multiple operating systems for each of the 16-bit, 32-bit, and 36-bit computer lines. The 18-bit PDP-15/40 connected to Massbus peripherals via a PDP-11 front end. An engineering goal was to reduce the need for a new driver per peripheral per operating system per computer family. Also, a major technical goal was to place any magnetic technology changes (data separators) into the storage device rather than in the CPU-attached controller. Thus the CPU I/O or memory bus to Massbus adapter needed no changes for multiple generations of storage technology.…
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Discussion questions
- Summarise the article in your own words. Which single claim would you verify first, and why?
- Which claim in this article is most likely to be revised as the sources update? How would you check its current status?
- If two sources disagreed about one of these facts, what would you need in order to trust one over the other?
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Key claims and bibliography are generated from the same tracked claims and sources as the article page.