Page attribute table
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The page attribute table (PAT) is a processor supplementary capability extension to the page table format of certain x86 and x86-64 microprocessors. Like memory type range registers (MTRRs), they allow for fine-grained control over how areas of memory are cached, and are a companion feature to the MTRRs. Unlike MTRRs, which provide the ability to manipulate the behavior of caching for a limited number of fixed physical address ranges, Page Attribute Tables allow for such behavior to be specified on a per-page basis, greatly increasing the ability of the operating system to select the most efficient behavior for any given task.
The page attribute table (PAT) is a processor supplementary capability extension to the page table format of certain x86 and x86-64 microprocessors. Like memory type range registers (MTRRs), they allow for fine-grained control over how areas of memory are cached, and are a companion feature to the MTRRs. Unlike MTRRs, which provide the ability to manipulate the behavior of caching for a limited number of fixed physical address ranges, Page Attribute Tables allow for such behavior to be specified on a per-page basis, greatly increasing the ability of the operating system to select the most efficient behavior for any given task.
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