Repeat instruction

In computer instruction set architectures (ISA), a repeat instruction is a machine language instruction that repeatedly executes another instruction a fixed number of times or until some condition is met. Since it is an instruction that operates on other instructions like the execute instruction, it has been classified as a meta-instruction.

In computer instruction set architectures (ISA), a repeat instruction is a machine language instruction that repeatedly executes another instruction a fixed number of times or until some condition is met. Since it is an instruction that operates on other instructions like the execute instruction, it has been classified as a meta-instruction. ==Computer models== The Univac 1103 (1953) includes a repeat instruction (op code mnemonic: ) which executes the following instruction a fixed number of times, possibly incrementing one or both of the address fields of that instruction. This compensates for the architecture's lack of index registers. The GE-600/Honeywell 6000 series (1964) supports a single-instruction repeat ( ), a double-instruction repeat ( ), and a linked-list repeat ( ). The x86 ISA, starting with the 8086, includes a series of special-purpose repeat instructions ( ) which are called "repeat string opcode prefixes" and may only be applied to a small number of string instructions ( ). These instructions repeat an operation and decrement a counter until it is zero, or may also stop when a certain condition is met. The Texas Instruments TMS320 digital signal processor (1983) includes an instruction for repeating a single-cycle instruction or two single-cycle instruction in parallel ( ) and an instruction for repeating a block of instructions ( ). These use special block-repeat counter registers ( ). The Motorola 68010 has a single instruction repeat called "loop mode." It accelerates loops consisting of one of 33 loopable instructions (such as MOV) and a DBcc (Decrement/Branch on condition). Two instruction opcodes are prefetched and held internally while subsequent memory read/write cycles are generated only for the data operands. ==Semantics== The instruction or instruction pair to be executed follows the repeat instruction. Fields in the instruction determine the loop termination condition. In the case of the TMS320, a block of up to 64 kilobytes can be repeated. ==References==

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