Lesson plan

Southbridge (computing)

In computing, a southbridge is a component of a traditional two-part chipset architecture on motherboards, historically used in personal computers. It works alongside the northbridge to manage communications between the central processing unit (CPU) and lower-speed peripheral interfaces. The northbridge typically handled high-speed connections such as RAM and GPU interfaces, while the southbridge managed lower-speed functions. The southbridge controls a range of input/output (I/O) functions, including USB, audio, firmware (e.g., BIOS or UEFI), storage interfaces such as SATA, NVMe, and legacy PATA, as well as buses like PCI, LPC, and SPI. Southbridge and northbridge components were often designed to work in pairs, though there was no universal standard for interoperability. In the 1990s and early 2000s, they commonly communicated via the PCI bus; more recent chipsets use Direct Media Interface (Intel) or PCI Express (AMD). Intel referred to its southbridge as the I/O Controller Hub (ICH), later replaced by the Platform Controller Hub (PCH), which connected directly to the CPU in later architectures. Since the mid-2010s, the traditional two-chip design has largely been replaced by single-chip platforms or system-on-chip (SoC) solutions that integrate southbridge functions into a single chipset or the CPU itself.

Back to article

Article summary

In computing, a southbridge is a component of a traditional two-part chipset architecture on motherboards, historically used in personal computers. It works alongside the northbridge to manage communications between the central processing unit (CPU) and lower-speed peripheral interfaces. The northbridge typically handled high-speed connections such as RAM and GPU interfaces, while the southbridge managed lower-speed functions. The southbridge controls a range of input/output (I/O) functions, including USB, audio, firmware (e.g., BIOS or UEFI), storage interfaces such as SATA, NVMe, and legacy PATA, as well as buses like PCI, LPC, and SPI. Southbridge and northbridge components were often designed to work in pairs, though there was no universal standard for interoperability. In the 1990s and early 2000s, they commonly communicated via the PCI bus; more recent chipsets use Direct Media Interface (Intel) or PCI Express (AMD). Intel referred to its southbridge as the I/O Controller Hub (ICH), later replaced by the Platform Controller Hub (PCH), which connected directly to the CPU in later architectures. Since the mid-2010s, the traditional two-chip design has largely been replaced by single-chip platforms or system-on-chip (SoC) solutions that integrate southbridge functions into a single chipset or the CPU itself.

Key claims

No claims recorded.

Discussion questions

  1. Summarise the article in your own words. Which single claim would you verify first, and why?
  2. Which claim in this article is most likely to be revised as the sources update? How would you check its current status?
  3. If two sources disagreed about one of these facts, what would you need in order to trust one over the other?

Bibliography

No sources recorded.

Key claims and bibliography are generated from the same tracked claims and sources as the article page.