Lesson plan
Electron E1
The Electron E1 is a power efficient CPU designed by Efficient Computer with an innovative architecture. Instead of the von Neumann architecture, the chip uses compute nodes distributed across the area of the chip. Rather than sequentially executed instructions, a compiled program is spatially distributed, with data flowing between the different instruction nodes when the results are ready rather than sequentially executed. Compared to systolic arrays or digital signal processors, the data flow is more flexible. Efficiency is improved since there is no instruction fetching, data caching, or collision detection.
Article summary
The Electron E1 is a power efficient CPU designed by Efficient Computer with an innovative architecture. Instead of the von Neumann architecture, the chip uses compute nodes distributed across the area of the chip. Rather than sequentially executed instructions, a compiled program is spatially distributed, with data flowing between the different instruction nodes when the results are ready rather than sequentially executed. Compared to systolic arrays or digital signal processors, the data flow is more flexible. Efficiency is improved since there is no instruction fetching, data caching, or collision detection.
Key claims
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Discussion questions
- Summarise the article in your own words. Which single claim would you verify first, and why?
- Which claim in this article is most likely to be revised as the sources update? How would you check its current status?
- If two sources disagreed about one of these facts, what would you need in order to trust one over the other?
Bibliography
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Key claims and bibliography are generated from the same tracked claims and sources as the article page.