Memory controller

A memory controller, also known as memory chip controller (MCC) or a memory controller unit (MCU), is a digital circuit that manages the flow of data going to and from a computer's main memory. When a memory controller is integrated into another chip, such as an integral part of a microprocessor, it is usually called an integrated memory controller (IMC). Memory controllers contain the logic necessary to read and write dynamic random-access memory (DRAM), and to provide the critical memory refresh and other functions. Reading and writing to DRAM is performed by selecting the row and column data addresses of the DRAM as the inputs to the multiplexer circuit, where the demultiplexer on the DRAM uses the converted inputs to select the correct memory location and return the data, which is then passed back through a multiplexer to consolidate the data in order to reduce the required bus width for the operation. Memory controllers' bus widths range from 8-bit in earlier systems, to 512-bit in more complicated systems, where they are typically implemented as four 64-bit simultaneous memory controllers operating in parallel, though some operate with two 64-bit memory controllers being used to access a 128-bit memory device. Some memory controllers, such as the one integrated into PowerQUICC II processors, include error detection and correction hardware.…

A memory controller, also known as memory chip controller (MCC) or a memory controller unit (MCU), is a digital circuit that manages the flow of data going to and from a computer's main memory. When a memory controller is integrated into another chip, such as an integral part of a microprocessor, it is usually called an integrated memory controller (IMC). Memory controllers contain the logic necessary to read and write dynamic random-access memory (DRAM), and to provide the critical memory refresh and other functions. Reading and writing to DRAM is performed by selecting the row and column data addresses of the DRAM as the inputs to the multiplexer circuit, where the demultiplexer on the DRAM uses the converted inputs to select the correct memory location and return the data, which is then passed back through a multiplexer to consolidate the data in order to reduce the required bus width for the operation. Memory controllers' bus widths range from 8-bit in earlier systems, to 512-bit in more complicated systems, where they are typically implemented as four 64-bit simultaneous memory controllers operating in parallel, though some operate with two 64-bit memory controllers being used to access a 128-bit memory device. Some memory controllers, such as the one integrated into PowerQUICC II processors, include error detection and correction hardware. Many modern processors are also integrated memory management unit (MMU), which in many operating systems implements virtual addressing. On early x86-32 processors, the MMU is integrated in the CPU, but the memory controller is usually part of northbridge, a separate chip. == Security == A few experimental memory controllers contain a second level of address translation, in addition to the first level of address translation performed by the CPU's memory management unit to improve cache and bus performance. Memory controllers integrated into certain Intel Core processors provide memory scrambling as a feature that turns user data written to the main memory into pseudo-random patterns. Memory scrambling has the potential to prevent forensic and reverse-engineering analysis based on DRAM data remanence by effectively rendering various types of cold boot attacks ineffective. In current practice, this has not been achieved; memory scrambling has only been designed to address DRAM-related electrical problems. The late 2010s memory scrambling standards do address security issues and are not cryptographically secure or open to public revision or analysis. ASUS and Intel have their separate memory scrambling standards. ASUS motherboards have allowed the user to choose which memory scrambling standard to use (ASUS or Intel) or whether to turn the feature off entirely.

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